Huawei's chip stacking patent**, 2 14nm chips surpass 7nm, and the technical strength is eye-catching.
Some time ago, a number of ** broke the news that Huawei has a new patent, the patent number is CN116504752A, and the patent name is"Chip stacking structure and its formation method, chip packaging structure, electronic devices"。
Some time ago, there were rumors on the Internet about the return of Huawei's Kirin chip, and many people put these two news together, saying that Huawei will either use the domestic 14nm process or use stacking technology to stack two 14nm chips together to achieve the performance of equal to or higher than the 7nm chip.
This speculation made industry insiders excited, feeling that once this technology has the performance of 7nm chips, then the US suppression will be completely ineffective, and Huawei's 5G Kirin chip will return to the king, and Huawei's mobile phone will also return to the king.
Of course, in the author's opinion, this is just speculation, of course, this speculation has no basis, because with 2 stacks of 14 nanometer chips, it is very difficult to achieve the performance of 7 nanometer chips.
The performance of a chip ultimately depends on the number of transistors, as one transistor represents a switch, and the more switches, the stronger the performance.
The chip process is constantly upgraded, in fact, in order to increase the density of transistors, in the same size of chips, more transistors are placed, so the performance is also improved.
Let's start with SMIC's 14nm process, which has a transistor density of about 30mtr mm, or 30 million per square millimeter. As for TSMC's 7nm process, the transistor density is about 97mtr mm, or 97 million per square millimeter, which is more than three times that of the 14nm process.
How to understand this?In other words, if the 14nm process needs to achieve the performance of the 7nm process, i.e., the same number of transistors on both chips, then the 14nm process needs 3 times the area of the 7nm process to achieve this.
In other words, to achieve the performance of 1 7nm chip (with the same number of transistors), 3 14nm chips need to be stacked on top of each other.
3 14nm chips are stacked on top of each other, if the planar area is 3 times the area of the 7nm chip, and if the top and bottom heights of the stack are 3 times the height of the 7nm chip, then the mobile phone may not be able to charge as the area or volume increases.
In addition, the power consumption of 3 14nm chips can be several times higher than that of 1 7nm chip, and according to professionals, the power consumption of the 14nm chip itself can be more than 2 times higher than that of 7nm chips, and the power consumption of 3 stacked together is 6 times.
Can you really stand this kind of heat generation, such power consumption?Especially for mobile phone chips, the requirements for mobile phones in terms of performance, power consumption and heat generation are too high.
In fact, the problem of chip stacking technology solutions should not only consider performance and power consumption, but also consider heating, electrical interconnection, packaging and testing, manufacturing process, etc., which is not as simple as theoretically imagined.
So for this kind of thing of stacking 2 14nm chips to achieve the performance of 7nm chips, just take a look, and you don't have to be very serious.