Today, the 8th Future Chip Forum was held in Beijing. The Future Chip Forum is an important annual academic conference hosted by the School of Integrated Circuits of Tsinghua University and the Beijing Advanced Innovation Center for Integrated Circuits, building a cross-border and interdisciplinary platform for the exchange of ideas among universities, research institutions and enterprises in the field. Academician of the International Eurasian Academy of Sciences, Professor Wei Shaojun of Tsinghua University talked about his own thoughts on future chips.
High-performance computing has entered the E-class era, and last year the U.S. Department of Energy released the world's first E-class computing supercomputer. E-level computation is a very important milestone, capable of accomplishing 10 billion exaflops per second. Immediately after the release of the supercomputer, the U.S. Scientific Advisory Board announced that the next target for high-performance computing in the United States is Z-level computing. Compared to E-level calculations, Z-level calculations are 1,000 times faster.
The industry's quest for higher computing speeds is never-ending. And the total amount of data is increasing, and by 2024, the total amount of data will reach 100 zettabytes. The volume of data has grown dramatically. Especially after the growth of artificial intelligence, the data is larger, so Z-level computing has become something that the industry has to solve.
Wei Shaojun pointed out: "It is almost impossible to achieve higher performance computing by simply relying on technological progress. "The reason is very simple, according to the process used by cutting-edge computers in the United States, such as the current 6nm process, the power consumption is as high as 211 MW on an area of 680 square meters. Semiconductor processes continue to move forward, and there are 5nm, 4nm, 3nm. If the 3nm process is used to achieve Z-level computing, the current power consumption is as high as 8,000 megawatts, which means that 8 million kilowatts of electricity are used in one hour, which is about 4 million yuan in electricity bills per hour. In terms of cost, it would cost $600 billion to achieve Z-level computing using a 3nm process. Although the progress of the process will bring about a reduction in costs, in general, the direct cost will not drop too much, covering an area of hundreds of thousands of square meters, which will also bring huge delays. As a result, higher performance computing is nearly impossible to achieve simply by process advancement.
At present, the computing resources of computing chips account for a very low proportion of the entire chip resources, less than 01%, the utilization rate is lower, but the energy consumption for data transmission is very high, for example, the energy consumption of GPU is very high, more than 90%. Based on such basic characteristics, it is very difficult to complete the next generation of computing based on the current computing mechanism and computing chips.
In addition, the requirements for computing power have reached an unparalleled level, and the vigorous development of artificial intelligence is well known, and there are currently two categories Xi of artificial intelligence, one is called brain-like computing, and the other is called deep learning. The three basic elements involved in these two categories include algorithms, data, and computing power. Among them, computing power has played a real driving role in artificial intelligence.
Current AI is far from what is expected. On the one hand, algorithms and human recognition are not the same, and AI is now required to be able to adapt to different applications. On the other hand, the implementation process of artificial intelligence is now more "violent". As an example, the implementation of a simple model in 2014 required about 19.6 billion operations per second and simultaneous processing of 1With 3.8 billion parameters, such high-density computing and high-density storage also bring great challenges to today's chips. Wei Shaojun said: "For computing architecture, it has entered the '** era'. Until now, it has been impossible to innovate computing architectures if we just follow the old traditions. ”
In the future, supercomputing that can provide support will basically require an investment of less than 10 billion yuan and a power consumption of less than 100 megawatts, covering an area of tens of thousands of square meters or even 10,000 square meters. Under such conditions, new potential requirements are put forward for chips, hardware, and software.
Intelligence extends our cognition. The information revolution, with computer, network, telecommunications, optoelectronics, and integrated circuit technologies as the main contents, has realized the extension and amplification of human sensory capabilities. Information technology will move forward hand in hand with artificial intelligence technology and new material engineering to push information technology to a new height and realize the extension and amplification of human brain capabilities. The industrial revolution, with mechanization, electrification and automation as the main content, has liberated human hands, provided huge energy for human beings, and realized the extension and amplification of human physical energy.
Since the first electronic computer in 1946, it has gone through three waves of intelligence. In 1990, Japan's fifth-generation computer was used as a symbol, which was the first wave of intelligence. By 2017, the scope of research was continuously narrowed down to classify and identify using algorithms Xi machine learning. Now, Google's DeepMind games are 10 times better than human pro gamers. It can be seen that the development of artificial intelligence has surpassed humans in many aspects.
Why is this happening?Canadian neuroscientists have made important contributions. Under his inspiration, after developing brain-like computing and deep learning Xi, you can use deep neural networks to train, although a bit violent, but you can achieve good results.
The mainstream architecture of artificial intelligence chips starts from AI chip 05 all the way up to AI Chip 17. Evolve from cloud AI to edge AI.
Wei Shaojun said: "Computing power is a sufficient condition for the development of artificial intelligence, and computing power relies on chips to achieve, so chips are indispensable, and later chips specifically for artificial intelligence appeared. "An application is an algorithm, n applications need n chips, in order to solve the problem of being able to implement different applications on one chip, a reconfigurable method based on flexibility has emerged. In the process of processing different algorithms, today's artificial intelligence is further improved through the improvement of computing power and versatility.
Today's industry imagines architectures that are more about computer architectures and may require exploring new technical implementations. But it is not necessary to think of a silicon-based semiconductor material, which can support massive input and massive output, may have basic weighting and activation function functions, and adopt the integration of storage and computing, ultra-low latency, ultra-low power consumption, extremely low cost, and can also be manufactured using the current CMOS process, and three-dimensional integration can be achieved in the future. This is a question that must be considered now, and if we can break through such a new technology of artificial intelligence, it may open up a new path.
Wei Shaojun is also thinking about whether the large model is indispensable for the chip, or whether the large model will have a negative impact on the chip. He did an experiment and asked "why does Lin Daiyu want three dozen white bone spirits" on chat GPT. The answers given by Chat GPT 4 and Chat GPT 3 are completely different. Instead of nonsense, Chat GPT 4 gives a more logical story.
However, ChatGPT is trained on a large amount of data and begins to grow its capabilities, which means that its own creative ability is very limited. The reason why people think that Chat GPT has a lot of novel ideas is because it gathers the wisdom of a group of people. In fact, Chat GPT is not creative, and it is more trained through data. In the translation of the dialogue with it, its logical relationship is not right, in fact, Chat GPT is not as smart as imagined.
Looking back, did large models help chip design?Many people think that the EDA industry is the best way to make use of large model design. Wei Shaojun said that there are two parts of the EDA industry that can use large models, one is EDA tools, and the other is design services, that is, the combination of large models and certain tools to produce results. Therefore, for this problem, Wei Shaojun said that large models are definitely helpful for chip design, but it is worth thinking about how much it helps.
Three-dimensional integrated circuits have been slowly starting to heat up lately, and Moore's Law has been developing, and the density is getting higher and higher in the process of development. Now the 5nm process can be integrated in a square millimeter about 1100 million transistors, which is 2,800 logic gates. Our integration capabilities are already greater than the chips that can be realized.
The basic device is constantly evolving, from 45nm, 32nm to 5nm, 3nm, from hight-k to finfet, finfet can be used to 7nm, and then to the 3nm process to GAA. GAA has a very short lifespan, it can be used for one or two generations, and no one knows if it can progress if it continues to move forward. Although two-dimensional devices and molecular devices are currently proposed, it is still a question whether this is feasible and whether the cost can be sustained.
At present, chiplet and 3D packaging are also proposed. In a sense, both approaches are integration in a broader sense, rather than traditional integrated circuit integration on a single chip. Wei Shaojun said that in the longer term, this approach is no problem, and it will even bring more important advantages, such as cost reduction. It is not necessary to use all the most advanced processes, and the time to development and time to market will be shorter.
After the development of 3nm, it is also possible to consider placing the transistor vertically vertically. Now that 3D NAND has done this, YMTC has made 3D NAND very high by using stacking technology.
On the other hand, if a new kind of fusion and new integration can be formed, it will not only solve a problem of computing and storage, but also realize the development of three-dimensional integrated circuits.
All in all, computing is everywhere. High-performance computing is a strategic highland for future development and the focus of great power competition. Today's computing architecture and integrated circuit technology are no longer able to support high-performance computing to the ZETTA level, and it is urgent to seek breakthroughs through architecture innovation.
Intelligence is the trend of the times, and the development of artificial intelligence depends on the progress of chip technology. Today's chip technology can no longer meet the needs of the rapid development of artificial intelligence technologyIt is urgent to start with the basic components and find a breakthrough point.
The arrival of the large model has broadened people's minds and given some novel development directions. Many people have strong expectations for the design of large-scale auxiliary chips. Today, we can't judge the specific help of large models for chip design, but we can make some judgments from the basic principles of large models, which will be comparedTake an objective and sober look at the role of large models in the design of integrated circuit chips.
The essence of integrated circuits lies in "integration". In the context of the development of Moording,It's time to start exploring the path and approach to 3D integration.
This article is compiled by Semiconductor Industry Vertical (ID: icViews) based on the speech of Professor Wei Shaojun of Tsinghua University at the 8th Future Chip Forum.
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