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Advanced packaging is a powerful tool in the post-Moore eraglobal market sizecagrReach
In the post-Moore era, the upgrade speed of advanced manufacturing processes is gradually slowing down, and the marginal cost of moving forward is becoming more and more expensive, and advanced packaging has become an important path to surpass Moore's Law. Benefiting from the continuous maturity of new technologies such as the Internet of Things, 5G communications, artificial intelligence, and big data, the advanced packaging market is expected to grow rapidly.
According to Yole, the global advanced packaging market size was $36.7 billion in 2022 and will reach $52.2 billion in 2026, with a 4-year CAGR of 92%, accounting for 54% of the overall packaging market from 45% in 22, of which 25D 3D has the highest growth rate, with a CAGR of 134%, increment is mainly driven by applications such as AI, HPC, HBM, etc.
From the perspective of the competitive landscape, most of the packaging market is occupied by packaging factories, with the top ten shares in 2022 totaling nearly 60%, and the top 5 are 15% for ASE Group, 9% for Amkor, 7% for Intel, 7% for TSMC, and 6% for JCET. In 2In the field of 5D 3D, TSMC is a global leader, with info (2D), CODOS (2.).5D) and SOIC (3D) packaging forms, with the help of the world's leading manufacturing process technology and the world's leading advanced packaging technology, TSMC has significant advantages.
The advanced packaging process is complex, which is expected to bring equipmentThe volume and price of materials have risen
Compared with the electrical connection of "wire bonding" of traditional packages, advanced packages introduce key technologies such as BUMPING, TSV, and RDL, and on this basis, they derive FI (fan-in), FO (fan-out), SIP (system-in-package), FCBGA (flip ball array), FCCSSP (flip mass package), 25D, 3D and other package forms. Catalyzed by the demand for massive data throughput such as big data and AI, advanced packaging is developing in the direction of smaller IO pitch and RDL line spacing to achieve denser IO interfaces and more sophisticated electrical connections.
Under this wave, the high number of AI chips has led to an increase in packaging demand, and the difficulty of chip packaging process and process cost have increased, which has led to an increase in the value of single chip packaging, and the two have jointly contributed to the increase in the volume and price of materials for upstream equipment in advanced packaging. The new equipment brought by advanced packaging mainly includes die bonding machines, hybrid bonding machines, electroplating equipment, etc., and the increase in material demand is mainly reflected in the fields of IC substrates, underfills, TIM materials, and molding materials. From the perspective of the competitive landscape, the core equipment and core materials involved in the current advanced packaging are monopolized by overseas manufacturers, and domestic substitution is flexible.
cowosThe advantages of packaging technology are outstanding and leadingaiA new wave of chip packaging
CoNOs has attracted industry attention as a packaging technology for NVIDIA GPUs and HBMs in AI applications, which was developed by TSMC in collaboration with Xilinx in 2012. cowos 2.5D packaging is interconnected through a silicon interposer to achieve multi-chip packaging, high-density interconnect, and power consumption optimization, and has been continuously upgraded in interposer area, heterogeneous interconnection, and memory bandwidth for more than 10 years. TSMC CodoS-R has RDL linewidth pitches up to 2 2 microns, and CoDoS-S enables sub-micron copper RDL interconnects. The important application scenario of COWOS is in the field of HPC and AI, and data center GPUs such as NVIDIA P100, V100 and A100 all use COWos technology, and more than half of the computing power in the TOP500 supercomputing in 2020 comes from chips based on TSMC's CODOS-S packaging technology.
An excerpt from the original report is as follows:
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