Artificial intelligence (AI) special application chips (ASIC) drive the demand for professional packaging and testing (OSAT) in the back-end of semiconductors, and the legal person pointed out that Taiwan factories, including ASE Investment Control, Jingyuan Electric, Nandian, Yingwei, Jingce and other factories, have gradually cut into the ** chain of AI ASIC-related packaging and testing, carrier boards and test interfaces.
AI chips drive the demand for semiconductor packaging and testing in the back-end, and the United States foreign-funded legal persons recently reported and analyzed that packaging and testing and chip carrier board manufacturers have cut into the customized AI ASIC ** chain designed by AI chip manufacturers NVIDIA and AMD, as well as technology manufacturers, and the relevant performance can be expected to increase next year.
Among them, on the chip testing side, according to the analysis of 6** report of the US foreign-funded legal person, Jingyuan has a high market share in AI graphics chip (GPU) testing, and has become the main testing partner of major AI chip manufacturers in the United States.
It is estimated that the proportion of AI-related performance in the overall performance of Jingyuan Electric this year can increase to 7% to 8%, and the proportion of next year is estimated to increase to 10%.
On the IC substrate side, according to the evaluation of the news of the **chain, Nandian began to provide the first ABF carrier board to the major cloud computing server equipment manufacturers in the United States through the Taiwan ASIC designer, and indirectly cut into the AI ASIC international chain.
On the test interface side, Wang Jiahuang, chairman of Yingwei, recently said that more and more enterprises will develop their own AI ASIC next year, plus existing customers, it is expected that the proportion of Yingwei's AI-related customer base will continue to increase, and high-end computing applications will be the main growth force of Yingwei next year.
Yingwei has also cut into the CONOS test interface of advanced packaging, and the relevant CODOS chip test verification is continuing, and it is estimated that the volume will start next year. According to the legal person, Yingwei has deployed microelectromechanical (MEMS) probe cards in the CODOS chip test.
Jingce recently pointed out that next year, it is estimated that the AI chip test interface solutions from next year, including GPUs, accelerated processors (APUs), ASICs and other related chips, will continue to contribute to the operation after the introduction of advanced packaging and testing business opportunities.
In response to the high-end packaging of AI chips, chip foundry UMC has cooperated with Winbond, Faraday, ASE Semiconductor and Cadence to deploy chip-to-chip 3D IC projects to accelerate the production of 3D packaging products.
ASE Semiconductor, a subsidiary of ASE Investment Holdings, is actively deploying fan-out FOCOS-BRIDGE (fan-out-chip-on-substrate-bridge) packaging technology, which can integrate multiple ASICs and high-bandwidth memory (HBM) to lock in the advanced packaging market for customized AI chips.
According to the analysis of foreign-funded legal persons, customized AI chips include ASIC accelerators developed by Intel, Google TPU, Tesla's Dojo supercomputer and fully automated driving assistance FSD, Amazon's Cloud Computing Services (AWS) Trainium series, Microsoft's Athena, Meta's MTIA architecture, etc., driving the demand for ASIC design, chip manufacturing and advanced packaging.
The United States has expanded its ban on the sale of advanced AI chips to China, and market research agency TrendForce recently predicted that China's cloud computing service providers will accelerate the expansion of their own research and development of ASICs, including Alibaba (Alibaba)'s T-Head and (Baidu) to actively invest in the development of self-developed AI chips next year.
Image by Wangxina).