JCET has made a breakthrough in 4nm chip packaging technology, when will it be able to achieve 4nm chip manufacturing?
Some time ago, an article "Absolute Breakthrough, China's 4-nanometer chips have been mass-produced, and the US blockade has completely failed" was in hot research, and I couldn't help but take a look, it's really a title party!
The content of this article is about the 4-nanometer chip packaging technology of the mainland company Changdian Technology, which is completely different from the mass production of chips.
The article also mentions that EUV lithography technology can be bypassed, which is even more absurd. EUV lithography technology is the world's leading technology, let's say, how many people's efforts can be bypassed?
The question is, what is the level of China's wafer industry?How long is it until the mass production of 4nm chips?
JCET packaging.
On November 21, 2022, Changdian Technology said: The company has realized the packaging of mobile phone chips with 4nm process, and cooperating with customers in chip and packaging design can help customers convert 2Various advanced packages, such as 5D and 3D, are integrated into smartphones and tablets.
It is this news that makes many people mistakenly think that domestic chips have surpassed 4nm technology and reached mass productionIn fact, this is just a breakthrough in 4nm technology in the packaging link.
What is Chip Packaging?
Chip packaging is a process after the chip is manufactured, that is, a simple shell is installed for the chip, which seals, fixes, protects the chip and enhances the electrical and thermal properties.
Although chip packaging is not as important as chip manufacturing, it should not be underestimated.
To some extent, it can be said that chip packaging is a part of chip manufacturing, because it is the selection of qualified chips from the entire wafer and then soldered to the outside of the circuit corresponding to the chip.
With the development of chip technology, the chip process from 28 nm to 14 nm, and then to 7 nm, 5 nm and even 4 nm, the channels between transistors are getting narrower and narrower, making it more and more difficult to manufacture and packaging.
In fact, it is not easy for JCET to achieve 4nm packaging and break into the forefront of the world.
Because of the packaging requirements.
1. The packaging area must be the same as the chip area as much as possible
2. The package pins should be as short as possible to effectively reduce the delay
3. The distance between the pins of the package should be as large as possible to ensure that they do not interfere with each other
4. The package should be as thin as possible, which is conducive to heat dissipation.
In addition, advanced packaging enables the rapid development of chiplet technology.
Chiplets are also known as:"Centrioles"or"Chiplets"Under the premise of not changing the process, it can improve the overall performance and computing power of the chip, and at the same time ensure the yield rate of the chip.
Chips require advanced packaging technology, especially three-dimensional packaging technology.
Therefore, JCET's 4nm packaging technology is still of great practical significance for the development of domestic chips.
What is JCET's positioning in the field of chip packaging?
Changdian Technology is the first in the mainland.
1. The world's top three chip packaging companies. The top two are the Sun and the Moon.
But in the field of packaging, there is another company that should not be underestimated, and that is TSMC.
In March 2022, Apple launched the chip M1UltraSoC using TSMC's CODOS-S packaging technology.
This technology uses an intermediate silicon layer to connect two M1MAX chips together to form a system-on-chip (SoC).The 5D package mode may be available for the MacPro's main chip.
What's more, Infineon's chip packaging technology is very solid. In other words, if you talk about packaging technology alone, there are many strong competitors in domestic Changdian Technology, and they may not be able to enter the top three.
But despite this, having advanced packaging technology is also the pride of domestic tablet PCs!
The real weakness of domestic inserts is still the architecture, EDA, equipment, materials and manufacturing.
Structure of domestic tablets.
Structure is a top priority in the tablet industry, and it directly determines the type and performance of the tablet.
We can think of it as the foundation and main structure of the house, imagine what height your house can be built to, whether its function is an office building or a residence, basically it is determined by the foundation structure.
So, the architecture is extremely important for the chip, and when you decide to make a chip, the first thing you need is the chip architecture.
But the reality is that the chip architecture is basically controlled by ARM, and Intel, ARM, and x86 architecture monopolize more than 90% of the world's chips.
Some time ago, RICS-V, which claimed to be able to break this situation, was also one"Streamlined instruction set architecture"。The difference is that RICS-V is an open-source instruction set architecture that anyone can design, manufacture, and sell.
In fact, RICS-V originated at the University of California, Berkeley, where a team of programmers developed RISC-1 in 1981, which forms the basis of today's RISC architecture.
The RISC-II chip prototype was launched in 1983, the RISC-III in 1984, and the RISC-IV in 1988.
In 2010, the research team launched RISC-V, a free and open instruction set structure licensed under the BSD license.
Today, ARM, x86, and RISC-V are the dominant CPU architectures.
ARM is the hegemon of the mobile market, and the IP is basically in the hands of ARM. Arm is not very friendly to domestic companies, and its newly developed Neoverse V1 and V2 refuse to be sold to domestic chip companies.
X86 is the mainstream of traditional PCs, which mainly process large amounts of complex data, and the IP is in the hands of Intel and AMD, two companies that are complying with the chip ban in Teach for China.
As for RISC-V, it is indeed open source and has many advantages, but it is really hard to say what the future holds, after all, it originated in a beautiful country.
This country also has its own architecture, which is Loongson's Loongarch architecture.
Loongarch is a truly independent set of architecture directives and has been evaluated for third-party intellectual property. Through evaluation, the third-party organization believes that Loongarch is not the same as ARM, x86, RISC-V, and MIPS
1.Loongarch's command system, instruction **, instruction format, and addressing methods are designed independently;
2.Loongarch's directive manual, description, and content expression are markedly different from the main international directives;
3.Loongarch does not pose the risk of violating the main international directive system.
Although the LoongArch architecture is independently developed by China, its overall performance and ecology are far lower than X86, and it is about 5 years behind Intel and AMD.
The LoongArch architecture is mainly used for desktop computers and servers. In the field of embedded mobile devices, there is still a blank in China.
Suffice it to say, we have fallen behind in the initial chip architecture.
EDA software.
In terms of chip design, our Huawei HiSilicon is very good, and the Kirin chip has surpassed Qualcomm Snapdragon, which is something we should be proud of.
Still"eda"Chip design tools are still in the hands of European and American companies.
EDA software, also known as EDA tools, translated into Chinese as electronic design automation, is an indispensable tool for industrial design and electronic design.
The strongest EDA software companies at the moment are Synopsys, Clarionelectronics, and SiemensEDA, these three companies account for more than 70% of the entire market, and they are very strong in technology, and they are called"EDA Big Three"。
These three giants have a comprehensive layout, each with its own strengths, and at the same time it is closely connected with the integrated circuit technology giants.
With a focus on digital design, static timing verification and SIP, Synopsys has a long history of working with TSMC, Samsung, and Intel.
Clarion specializes in analog, hybrid digital analog, digital backend and IP, and has long-standing partnerships with TSMC and ARM.
Siemens EDA focuses on back-end verification, design for testability, optical proximity correction, and has long-term partnerships with TSMC, ARM, and AMD.
The EDA software of the three giants can design chips below 5 nanometers.
The strongest EDA software in China is Huawei Jiutian, which inherits the technology and market of Panda Software, and also has the strongest EDA design team in China, but compared with the international level, it can only be regarded as second-rate.
Huawei Jiutian has achieved the world's leading position in LCD design and circuits on the 5nm process, but other aspects such as digital design, analog design, static timing, IP, and SIP can only be designed under the 16nm process.
What's even more terrifying is that the design team of Empyrean is only 500 people, which is equivalent to 1 10 of the three giants, and at the same time, Empyrean cannot cooperate with advanced manufacturing companies such as TSMC and Samsung, and cannot verify the performance of advanced EDA.
In other words, if you want to design chips with advanced processes, you must use the EDA tools of the three giants, and Dahua technology can only meet the needs of 16nm and above processes.
Manufacturing process. As we all know, wafer fabrication is our weak point.
First of all, in terms of manufacturing process, TSMC is well-deserved to be the first in the world, and Samsung and Intel also have EUV lithography machines, but the gap with TSMC is still very large.
The strongest domestic chip manufacturing strength is SMIC, which can currently mass-produce 12 nanometers, a difference of 3 generations compared with TSMC.
TSMC mass-produced 12-nanometer chips in 2017 and now mass-produces 3-nanometers, a gap of nearly five and a half years.
In other words, even if SMIC now owns half of the world's EUV lithography machines, it will take five or six years to mass produce 3nm chips, and if you take into account the gap in technology and engineers, I am afraid it will take even longer.
But we don't even have EUV lithography technology right now, so it's a bit far-fetched to talk about 3nm!
Ultraviolet lithography technology.
We all know that process chips of 7nm and below require EUV lithography technology, but this can only be manufactured by ASML, so many countries and R&D institutions are trying to bypass EUV lithography technology.
Laser lithography technology, X-ray lithography technology, etc. have been put on the research and development agenda.
In fact, as early as the 80s of the 20th century, electron beam lithography technology, ion beam lithography technology and EUV lithography technology began to develop at the same time. After an exhaustive comparison, ASML opted for EUV lithography.
It turns out that ASML made the right choice, and ASML was lucky, 135nm EUV lithography can produce 3nm chips after 3 times**.
At this point, fantasizing about replacing mature EUV light with lasers, X-rays, etc. is a fool's dream, and even if it can be realized in the next few years, it will be too late, because ASML's EUV lithography technology is being updated.
Some have proposed quantum chips that go beyond EUV lithography.
It is true that quantum chips can indeed bypass EUV lithography because they are much more powerful than traditional chips. Jack Ma claims that quantum computing can replace one million servers on Alibaba Cloud with one server.
The difficulty of such a powerful quantum chip will only be more difficult than that of EUV lithography.
More importantly, how are the quanta on quantum chips generated?We still have to rely on traditional technology, with the help of traditional more powerful physical devices, electronic technology, integrated circuit technology, to carry out complex computational generation.
However, the traditional wafer technology cannot bypass the EUV lithography technology, so it has returned to the original point.
Therefore, technological innovation is inseparable from the support of traditional technologies, and it will not succeed if it does not involve 2G and 3G, but directly involves 5G and 6G. If you don't run directly, you will inevitably fall badly.
Therefore, EUV lithography technology or its implementation, EUV light sources, lenses, precision bearings, etc., are still necessary, even if they cannot be realized in isolation, even if they are integrated into the overall precision technology.
Therefore, from the perspective of EUV lithography technology research and development, it is not possible to solve the problem in a short period of time.
Semiconductor materials.
There are many semiconductor materials, but most of them are mainly in Japan, the United States, Europe, and South Korea, among which Japan is the main one.
High-purity hydrogen fluoride, photoresist materials, and fluorinated polyamides in semiconductor materials are basically monopolized by Japan.
It is almost impossible to reverse analyze the technology and content of these materials, and therefore it is impossible"Imitation"。The manufacture of these materials requires delicate processes and operational steps, as well as a long period of experience.
For example, high-purity hydrogen fluoride requires impurities to be controlled to less than one part per trillion, which is impossible without sufficient time and patience.
Another example is photoresist, which is a material required for the photolithography process and consists of resin-based polymers, photoinitiators, solvents, monomers, and other additives.
At the same time, photoresist materials require good resolution and contrast, as well as certain sensitivity, viscosity, adhesion and corrosion resistance, as well as high requirements for surface tension, storage, etc.
How to meet the needs of 7nm chip manufacturing?It is necessary to find out the production methods and proportions of various reagents, and there can be no mistakes. In 2019, TSMC had a photoresist material pollution incident, with a direct loss of nearly 4 billion yuan.
Therefore, in order to master the related technology of semiconductor materials, it is impossible to master the core technology without several years of hard work and meticulous and distracting research.
And the lack of distractions is exactly what we lack the most, everyone is engaged in finance, real estate and other fast-money industries, who wants to devote themselves to thankless research?
Therefore, semiconductor materials seem simple, but in fact, it tests our patience.
Changdian Technology has broken through the 4nm packaging technology, which is gratifying, but on this basis, China has mass-produced 4nm chips, which is really too much!
The real status quo of domestic chips is to reach a mature 28nm national production process within the year, while 7nm and the next process are also subject to architecture, EDA software, manufacturing, EUV lithography, semiconductor materials, etc.
So, when will we be able to achieve mass production of 4nm chips?5 years?Or 10 years?It's hard to tell.
I mean: don't ask, work R&D, hope is ahead!