In addition to the well-known manufacturers Zhaoxin, Haiguang, Kunpeng, Feiteng, Loongson and Shenwei in the domestic CPU market, there are also some emerging companies such as Alibaba and ZTE, which are exploring the road of independent research and development of CPUs. Although there are many domestic companies that have invested in research and development, all domestic CPUs have adopted 6 kinds of instruction sets. In order to give you a better understanding of these six instruction sets, we will introduce them one by one below.
1. Zhaoxin and Haiguang under Complex Instruction Set (CISC).
Zhaoxin and Haiguang were developed under the Complex Instruction Set (CISC) system. Among them, Zhaoxin Chip Company acquired VIA (VIA), and VIA had obtained the x86 instruction set authorization, so Zhaoxin is equivalent to inheriting the x86 instruction set authorization. Through cooperation with AMD, Haiguang has obtained the authorization of X86 instruction set and ZN1 architecture, so that it can carry out independent research and development on the basis of X86 architecture and has a high degree of freedom.
2. Kunpeng, Feiteng, Ali and ZTE under the Simple Instruction Set (RISC).
Under the Simple Instruction Set (RISC) system, companies such as Kunpeng and Feiteng are licensed under the ARM architecture. For example, Huawei's Kunpeng and Feiteng can only develop chips based on ARM's V8 architecture, while companies such as Alibaba and ZTE continue to develop based on ARM's V9 architecture. Although these companies have architectural licenses, they have relatively low freedom and can only use prescribed words for chip development.
3. Special instruction set
In addition to the common instruction sets, there are some special ones. For example, Loongson adopted the MIPS instruction set in the early days, and later independently expanded the Loongisa instruction set, and launched the 100% self-developed LoongArch instruction set last year, making it highly independent and controllable in independent research and development. Shenwei adopted the alpha instruction set in the early days, and later independently expanded the SW64 instruction set, although it still relies on the alpha instruction set, but because the alpha instruction set has long been operated by a physical company, Shenwei also has a certain degree of freedom.
4. Free and open source instruction set (RISC-V).
The RISC-V instruction set is a free and open source instruction set, which is equivalent to exposing all 26 letters to everyone. Therefore, the RISC-V instruction set is considered to be one of the most autonomous controllabilities. Many enterprises can develop with the RISC-V instruction set, which has a high degree of freedom.
From the above introduction, it can be seen that different instruction sets are authorized to different enterprises, and their degree of autonomy and controllability is also different.
First of all, Zhaoxin and Haiguang, as chip companies that use complex instruction sets, have been authorized by the x86 instruction set, which allows them to have a high degree of freedom in independent research and development.
Secondly, companies such as Kunpeng, Feiteng, Ali and ZTE have adopted ARM's instruction set, which is mainly an architecture authorization, which makes them have certain restrictions in chip development, and they need to develop within the specified range, with a relatively low degree of freedom.
Loongson and Shenwei use a special instruction set, although it has higher autonomy and controllability than ARM, but still relies on partial authorization, so the autonomy has certain limitations.
Finally, as a free and open source instruction set, the RISC-V instruction set gives enterprises the maximum degree of autonomy and controllability, so that enterprises can freely play according to their own needs and develop more innovative chips.
First of all, autonomous controllability can strengthen the continuous innovation and development of CPU technology. By having its own instruction set authorization, enterprises can conduct R&D without restrictions and drive technological advancement and innovation in CPUs.
Secondly, independent controllability can improve the competitiveness of the domestic chip industry. In the global chip market, independent and controllable CPUs have higher market competitiveness, can meet the needs of different fields, and make the domestic chip industry more competitive.
Finally, autonomy and controllability can reduce dependence on foreign technologies. Through independent research and development and independent and controllable CPU technology, domestic enterprises can reduce their dependence on foreign technology and improve information security and security
To sum up, the independent controllability of domestic CPU is an important part of the country's scientific and technological development. It has played a positive role in promoting the innovation and development of CPU technology, improving the competitiveness of the domestic chip industry and strengthening information security. Through the mastery and development of different instruction sets, domestic enterprises have also made great breakthroughs and progress in independent controllability.
The development of domestic CPUs has gone through many stages, and there are currently multiple manufacturers in the market, among which there are also differences in the degree of independent research and development of enterprises that master different instruction sets. By mastering instruction set authorization, enterprises can achieve independent research and development, and have higher advantages in technological innovation, market competition, and information security. Among them, the free and open source nature of the RISC-V instruction set gives enterprises a higher degree of freedom, making it one of the options with extremely high autonomy and controllability. In the development process of domestic CPUs, the improvement of independent controllability will play a positive role in promoting the entire chip industry.
(Total word count of this article: 2835 words).