Although the limitations of Moore's Law have been repeatedly emphasized due to economic, technical, and physical factors, Moore's Law persists. Moore's Law is the rule of thumb that has driven the semiconductor industry for more than half a century. Semiconductors have made significant progress due to higher integration and lower cost (the cost of each transistor installed in an integrated circuit is lower) in accordance with Moore's Law, and electronic devices equipped with semiconductors, as well as their applications, have become more popular and have changed significantly. Moore's Law has become the "absolute foundation" for industries such as semiconductor manufacturing equipment, materials, devices, electronic equipment manufacturers, and service providers.
Although the limitations of Moore's Law have been repeatedly emphasized due to economic, technical, and physical factors, Moore's Law persists. Lately, people have been saying "Is Moore's Law over?"."With the practical application of EUV lithography, known as extreme ultraviolet lithography, the lifespan of Moore's Law has been further extended. Still, atoms can't get smaller, so two-dimensional miniaturization will eventually reach its limit, but some integrated circuits continue to increase their density by three-dimensionalization. In the future, 3D technology will reach its limits, just like skyscrapers.
Learn about the primitive** of Moore's Law
First, let's understand what Moore's Law is by looking at the source sources.
In 1965, Gordon Moore, the founder of Intel and then the R&D director of Fairchild Semiconductor, responded to the invitation to "fill more components with integrated circuits" at the 30th anniversary of Electronics magazine, and wrote that "the number of components in integrated circuits is about doubling every year, and will continue to grow, at least for ten years, and by 1975, a quarter-inch semiconductor will probably contain as much as 65, 000 elements".
Mr. Moore has attached two charts to this article in an attempt to illustrate that the upcoming release of integrated circuits is a promising electronic device whose component count will increase dramatically in the future.
*:Intel.
The level of integration continues to double every year
The complexity of integrated circuits, i.e., minimizing the manufacturing cost of each component in an integrated circuit, increases at a rate of about twice as much each year. In the short term, this growth rate will not increase. In the long run, while the growth rate is somewhat uncertain, it is likely to remain roughly constant for at least the next 10 years. By 1975, the minimum number of integrated circuits that he could produce using wafers would be 65,000 components.
A double logarithmic plot of the relationship between the cost per manufacturing of electronic components installed in an integrated circuit each year (vertical axis: relative value) and the number of electronic components installed in an integrated circuit (horizontal axis). *:Intel.
Moore**, there is an optimal number of components in an integrated circuit that minimizes the manufacturing cost per electronic component, and this number will increase every year as technology advances. Encapsulating too many electronic components and increasing the level of integration increases the number of defects, reduces manufacturing yield (yield), and increases the cost per electronic component. Conversely, if the number of electronic components is too small, the unit cost will increase. What he wants to say most is that the number of components on an integrated circuit will increase rapidly with the advancement of technology, that is, over time, so as to minimize the manufacturing cost of integrated circuits.
The number of electronic components installed in an integrated circuit per year (the dotted line is the ** value). *:Intel.
The figure above is the famous semi-logarithmic graph, which is the basis for proposing "Moore's Law". Moore plotted the number of components in four ICs manufactured and released by Fairchild Semiconductor in 1965. Both are commercial integrated circuits equipped with the minimum number of electronic components depicted in Figure 3.
Mr. Moore boldly extrapolated the straight line of a semi-logarithmic graph obtained with only four points to 10 years later, in 1975. This straight line means that the number of components installed in an integrated circuit doubles every year. This was the rule of thumb that came to be known as "Moore's Law". This has no theoretical basis, it is just made based on experience in just three years since the advent of integrated circuits.
Regarding the future, why did he make such a bold **?
At that time, discrete transistors were still in their heyday, and any electronic circuit could be built with only discrete transistors without the need for expensive integrated circuits, so there was a general trend that consumers did not need to use high-cost integrated circuits. Circuits are only used in a limited number of applications, such as military applications, where cost is not an issue.
At the end of the article, he expands on his **, stating that as the level of integration increases, the cost per electronic component decreases, the cost of electronic devices will drop significantly, and "they will become ubiquitous throughout society." He also cites specific integrated circuit applications, such as "home computers, or at least terminals connected to computers, automatic controls for automobiles, and personal mobile communication devices."
At the end of 1975, 10 years after writing this article, Moore revisited the trend of integrated circuit density over the past 10 years and concluded: "From now on, the density of semiconductors will double every two years." Since then, everyone has called this ** "Moore's Law", which has not only become the absolute reference of the semiconductor industry, but also the absolute reference of the electronics industry. This law is often referred to as "the density of semiconductors every 18 to 24 months (1.).5 to 2 years) will double". This could be confused with Intel's MPU performance, which doubled in 18 months.
Moore's Law has been around for more than 50 years
In 2015, Moore's Law celebrated its 50th anniversary. Over the past 50 years, semiconductors have made significant progress in Moore's Law miniaturization, higher integration, and lower costs. As Moore predicted, electronic devices that utilize semiconductors make life more comfortable and efficient.
When Moore's Law was proposed, the level of integration was defined as the number of parts of all electronic components, including the resistors mounted on integrated circuits, but as the level of integration increased, transistors accounted for the majority of electronic components. In the first 40 years or so, the level of integration of integrated circuits was improved by the miniaturization of gate widths and line widths of MOS transistors. As miniaturization becomes more and more difficult, it is repeatedly said that "Moore's Law has failed" and "Moore's Law is over".
Here are some examples of transistor structure and material changes that extend the life of Moore's Law. The planar structure, which has been used since the invention of integrated circuits, has been replaced by a FinFET structure, which suppresses the leakage current between the source and drain and improves the current driving capability. Insulating film The gate material has also been changed from the conventional SiO2 SIN (silicon nitride insulating film) poly Si (polycrystalline silicon) gate to a high-k (high dielectric constant insulating film) metal gate, which suppresses gate leakage current.
The conventional wiring material AL has been replaced by CU with high electrical conductivity, and CO and RU will also be used in the future. As a cornerstone of microfabrication technology, lithography improves its resolution by shortening the wavelength of the light source used: G-line (436nm) I-line (365nm) KRF (248nm) ARF (193nm) In addition, the resolution has also been improved with the introduction of ARF immersion lithography, which uses an ARF excimer laser as a light source and water as an immersion liquid between the lens and the wafer. Later, EUV (extreme ultraviolet, 3.) was originally considered impossible to achieve5nm) lithography became practical, opening the way for the miniaturization of logic devices above 7nm, and Moore's Law became a reality.
Let's take a look at how semiconductor devices have increased the number of transistors in accordance with Moore's Law over the past 50 years.
According to a survey by IC Insights, a U.S. semiconductor market research company, while the growth rate of some product categories has slowed, as will be explained later, 3D has already begun in some devices.
The number of transistors installed on a semiconductor chip varies with the type of semiconductor device. **ic insights
Until around 2012, NAND flash memory capacity was growing at an annual rate of 55-60% but has since declined to around 30%-35% per year. The miniaturization of two-dimensional structures stopped at 20 nanometers or slightly below that, and as will be explained later, NAND has regained the momentum of capacity increase by being ahead of other devices in three-dimensionalization, already increasing from 128 to 300 layers.
Until 2010, the number of transistors installed in Intel's PC microprocessors (MPUs) was growing at an average annual rate of about 40%. Since then, that proportion has been halved. Although the growth in the number of transistors in Intel's server MPUs was temporarily halted in the mid-to-late 2000s, it has since begun to grow at a rate of about 25% per year. By the way, Intel has repeatedly suffered setbacks in the development of miniaturization above 10 nanometers and has decided to outsource the manufacturing of some advanced CPUs to TSMC. The company focuses on installation technology to increase the density of integration through 3D technology.
The number of transistors in Apple's A-series application processors (APUs) used in iPhones and iPads has exceeded 100 million transistors since 2013, making it a world leader in miniaturization.
Nvidia's high-end GPUs are equipped with more transistors than other companies' processors, already more than 50 billion and are increasing their density in accordance with Moore's Law. Based on the results of this analysis, IC Insights said that Moore's Law, as the driving force of the semiconductor industry, aims to innovate beyond technical barriers, which should not be underestimated.
Only three companies survived the miniaturization race
Let's look at the trends of semiconductor companies from the perspective of miniaturization. As circuit patterns become more sophisticated, process development costs and capital investment costs soar, leading many semiconductor companies to withdraw from the miniaturization race. 2002 Around 2003, there were 26 semiconductor companies in the world that could manufacture 130nm devices, but there were 18 companies for 90nm devices, 14 companies for 45nm devices, and so on. Most Japanese companies stopped miniaturization at 45 40nm.
Changes in the companies that survive each generation of semiconductor miniaturization. **yole développement
In the future, the transistor structure will continue to evolve from FinFET to gate-all-around, that is, the channel region is surrounded by a gate, which suppresses leakage current and improves the current driving capability of the gate. Instead of silicon or strained silicon, GE or III-V compounds grown selectively on silicon are used in the channel section.
With the advent of high-NA EUV and 2D materials, Moore's Law will continue beyond 1nm
According to IMEC, a Belgian advanced semiconductor research institution, two-dimensional (2D) materials such as graphene and transition metal disulfides are expected to drive Moore's law beyond 1 nm.
imec's roadmap for miniaturization of semiconductor logic devices. **imec
The vertical axis is the number of transistors per dollar of manufacturing cost, and the horizontal axis is the year. Up to around 28 nanometers, integration can be achieved according to Moore's Law simply by scaling down the conventional structure, but in order to continue to expand Moore's Law beyond 28 nanometers, it is necessary to optimize both IC design and process technology. There is even a view that other approaches must be developed to achieve simultaneous optimization of technology, IC design, and system design. IMEC and other semiconductor manufacturers are experimenting with these simultaneous optimization methods to extend the lifetime of Moore's Law.
However, once we reach the stage where the so-called "atoms cannot shrink further", we eventually reach the limits of physics.
"Moore's Law 20" from 2D miniaturization to 3D stacking
Many people misinterpret Moore's Law as a law related to miniaturization, but it is actually a law related to integration. Of course, miniaturization increases the level of integration per unit volume, so there is no doubt that this is an effective way to increase the level of integration. Moore's Law doesn't end just because plane miniaturization becomes impossible. If they are stacked in three dimensions, the density per unit area will increase and Moore's Law will last longer. In the future, the degree of integration will increase vertically. Some refer to this increase in integration through 3D as "Moore's Law 2."0 ”
In terms of 3D implementation, memory enters the practical phase much earlier than logic. NAND flash is leading the way to 3D. With the current 20-15nm process in mass production, all companies have abandoned miniaturization and turned to 3D stacking of memory cells in favor of increasing bit density per chip area. It is called "3D (three-dimensional) NAND".
Toshiba became the first company in the industry to come up with the concept of 3D NAND in 2007. Using an etching process that penetrates multiple layers of film from top to bottom, multiple storage cells can be formed at once. Significant costs can be reduced compared to the method of forming storage cells one at a time.
In addition to flash memory, companies are also working on 3D DRAM, but it has not yet been put into practical use. Conversely, three-dimensional packaging, in which multiple completed DRAM chips are stacked and interconnected using through-silicon vias (TSVs), is already in practice. DRAM modules stacked with multiple DRAM chips and controller chips connected via multiple TSVs are being used in high-end networking equipment and supercomputers.
As an alternative to the traditional "chip integration", an example of "system integration" in which multiple chips are mounted on a board. **TSMC.
With regard to logic devices, we are moving from so-called chip integration (increasing the level of integration within a single chip) to chiplets (which Intel calls tile), which are multiple semiconductor chips or traditional SoC chips divided by function on a package substrate. System integration is becoming mainstream. Configuring the system by placing the chips tightly together on a silicon interposer mounted on a substrate is called 25D installation.
*: Samsung Electronics.
Here, we will introduce the standard system integration approach adopted by TSMC, which has numerous Fabless and IDM customers around the world. The first one is info. It features an encapsulated I/O terminal area that extends beyond the silicon chip, can handle more than 1,000 I/O pins, and allows for multi-chip mounting. The high-density redistribution layer that relocates the input and output signals from the input and output pads of the silicon chip to the input and output terminals of the package is called a redistribution layer (RDL) and is formed using a thin-film process.
The second type of cowos is an intermediate silicon substrate called an interposer that forms multiple layers of wiring on a resin package substrate, on which multiple silicon chips are arranged in close proximity to each other.
And, TSMC has developed the more difficult SOIC (Integrated System-on-Chip), which uses chip stacking and wafer stacking to build systems. SOIC is further segmented into COW (Chip on Wafer) and WOW (Wafer on Wafer). The SOIC structure allows multiple semiconductor chips (or wafers) to be stacked with bumpless interconnects, allowing signals to be transmitted from one chip to another over the shortest distance.
Variations in device density and interconnect pitch for various mounting technologies. **TSMC.
The diagram shows the evolution of TSMC's device IO (input output) density and interconnect pitch for various packaging technologies.