Author | zer0
Edit |Desert Shadow
Xinxi said on December 28, at the end of 2023, a new 100 million-level financing was born in the field of AI chips.
Xinxi learned that Corerain Technology, a reconfigurable data flow AI chip startup in Shenzhen, announced the completion of hundreds of millions of yuan in Series C financing, led by Puluo Capital, followed by CDH Baifu, Unicom's Lianchuang**, Zhang Keyaokun**, and Zhonglou Financial Holding Group.
Corerain focuses on underlying technology innovation and develops high-performance, low-cost, high-computing AI chips based on the reconfigurable data flow technology route. The reconfigurable data flow architecture is a computing architecture that defines the computational order based on the reconfigurable spatial connections.
The new financing will be mainly used to support the R&D and large-scale implementation of Corerain's next-generation reconfigurable data flow CAISA AI chips, and build the industrialization ecosystem of CAISA chips in various vertical industries.
Corerain was founded in 2017, and most of the early team members were from Imperial College London.
Its founder and CEO, Dr. Xinyu Niu, graduated from Fudan University with a bachelor's degree in electronic engineering, and then went to Imperial College London for further study under the supervision of Wayne Luk, a professor at Imperial College, a member of the Royal Academy of Sciences, a fellow of the IEEE, and a fellow of BCS.
Dr. Xinyu Niu.
Lu Yongqing is a well-known academic expert in the field of custom computing, the only academician of the Royal Academy of Sciences, the British Engineering Society, and the British Computer Society in the field of AI chips in the world.
Academician Lu Yongqing.
Dr. Cai Quanxiong, CTO of Corerain, is a postdoctoral fellow at Imperial College London.
Dr. Chua Kuen-hung.
In the view of the Corerain team, the peak computing power and chip utilization rate are multiplied to measure the measured performance of the chip.
They have independently developed a reconfigurable data flow architecture solution, hoping to allow data to flow directly between computing units, overlap the time of data calculation and transportation, thereby reducing the overhead of instruction data transfer and improving the computing power performance of AI chips.
Different from the instruction set architecture based on the time sequence of instructions, the reconfigurable data flow architecture does not contain instructions, and controls the calculation order by modifying the connection relationship of computing units in space, so as to optimize the redundancy brought by instruction read and write operations, which can achieve higher chip utilization and meet customers' computing power needs without pursuing high process technology.
In 2020, Corerain launched the world's first reconfigurable data flow architecture AI chip, CAISA, which achieves an order of magnitude improvement in chip utilization indicators compared with similar international products, with a chip utilization rate of up to 954%, the delay can be less than 3ms.
With a new technology route chip based on a reconfigurable data flow architecture, Corerain has won a number of top awards in the field of artificial intelligence, such as the first prize of the chip project of the Wu Wenjun Artificial Intelligence Science and Technology Award, the highest award of the World Artificial Intelligence Conference, the Sail Award for Outstanding Artificial Intelligence Leader, and the "China Chip" Excellent Technological Innovation Product Award under the guidance of the Ministry of Industry and Information Technology.
Up to now, a series of computing products based on CAISA chips have covered all categories of computing products such as accelerator cards, edge stations, intelligent computing hosts, and intelligent computing servers.
These products have served more than 700 information enterprises such as China Mobile, China Unicom, China Telecom, China Tower, Inspur Group, ZKTeco, CETC, and the delivered computing products support customers to deliver thousands of digital projects in more than 20 industries such as petrochemical, mining, electric power, and urban lifelines.
Xinyu Niu, founder and CEO of Corerain, said that Corerain's mission is to provide a next-generation computing platform to accelerate the implementation of artificial intelligence.
Among them, "providing a next-generation computing platform" means continuously iterating the CAISA chip product line and improving the cost-effectiveness and ease of use of computing power through a new reconfigurable data flow technology route"Accelerating the implementation of artificial intelligence" means continuing to build an ecosystem that creates value for customers and win-win with ecosystem partners.
Niu Xinyu said that after multiple generations of product iterations, the CAISA series of chips have been recognized and supported by more and more customers, and the feedback from the market proves that this is a feasible path that can provide higher performance, lower cost and create value for customers.
Puluo Capital, CDH Baifu, China Unicom's Lianchuang**, Zhang Keyaokun**, and Zhonglou Financial Holding Group, which participated in Corerain's Series C financing, all expressed their recognition of Corerain's innovative reconfigurable data flow architecture technology accumulation from the underlying architecture.
According to Xu Chenhao, executive partner of Pro Capital, the reconfigurable data flow architecture is one of the best solutions that can significantly improve the cost performance of computing power and solve the problem of "stuck neck" in advanced processes.
Ying Wei, managing partner of CDH Baifu, called Corerain "a scarce domestic reconfigurable data flow architecture AI chip target", and is optimistic that Corerain will empower multiple application scenarios with cost-effective solutions.
As a national team of big data computing power platform, China Unicom pays great attention to the ecological layout of the computing power track. Xu Boming, general manager of China Unicom's Lianchuang **, commented that Corerain's reconfigurable data flow architecture technology has taken a new path on the vertical track, providing a new choice for the underlying computing power support for the development of the current digital economy.
Gu Minqiang, investment director of Shanghai Zhangke Yaokun Venture Capital Partnership (Zhang Keyaokun**), said that Corerain's reconfigurable data flow architecture can reduce the dependence of chips on advanced manufacturing processes under the same computing power requirements, and has a strong advantage in product cost performance. At the same time, its products have been applied in multiple scenarios and have been initially verified by the market, which is the main reason why they chose Corerain.
Yan Jiandong, Chairman of Zhonglou Financial Holding Group, mentioned that Corerain has created a complete AI implementation plan in closed application scenarios such as coal mines, providing strong support for the leading industries in Zhonglou District to accelerate digital transformation, improve production efficiency and optimize the industrial structure.
In May this year, the General Office of the Shenzhen Municipal People's Government issued the "Shenzhen Action Plan for Accelerating the High-quality Development and High-level Application of Artificial Intelligence (2023-2024)", proposing to enhance the ability of key core technologies and product innovations, and focus on the implementation of major special support plans for artificial intelligence science and technology in the fields of intelligent computing power chips.
With the boom of generative AI and large models bringing new computing power needs and opportunities, AI chips are becoming increasingly important as the infrastructure and core kinetic energy of the AI era. Among them, the performance, accuracy, cost, stability, versatility and software adaptability of the CAISA chip, which adopts the innovative technical route of reconfigurable data flow architecture, have been verified by the market.
Niu Xinyu said that at a time when the demand for AI computing power is booming and AI computing power is "stuck", the Corerain team will continue to follow this new path and use CAISA architecture innovation to allow more customers to use AI chips with higher performance, cheaper and better use.
In addition to Corerain's data flow architecture, many well-known international giants are also using data flow to optimize chip design, such as Google's TPU partially using the data flow architecture, and NVIDIA's GPU also introducing the concept of some data flow.