Not long ago, a Reuters article mentioned that Silicon Valley startup Zglue ** patented its chiplet technology.
The patent ended up in the patent portfolio of Chipuller, a start-up in Shenzhen, and it sparked a heated discussion on the Internet about China's chiplets, which was also reported by several foreign media.
Chiplet technology is a modular alternative to monolithic chips. The chip is divided into multiple chiplets, each with its own function and purpose. These chiplets are then assembled and connected to form a system on a chip, rather than a typical system-on-chip (SoC). The advantage of a modular approach is that it reduces development time and costs, shortens time to market, and increases flexibility, but it also increases the complexity of packaging and testing. Key equipment for assembling chiplet-based packages includes bonding tools with chip-to-chip, chip-to-wafer, or wafer-to-wafer capabilities.
In September 2020, the U.S. imposed an export ban on China's SMIC, which led to the establishment of the China Chiplet Industry Alliance. The alliance unites domestic IP vendors, leading packaging vendors, leading system and application vendors, packaging, test and assembly vendors and leading players in the packaging, test and assembly industry, as well as IC substrate manufacturers to coordinate cost control and commercial viability. (*Electronic Times). The consortium has also published the Chip Interconnect Interface Standard – ACC 10（advanced cost-driven chiplet interface 1.0）。
*: China Chiplet Industry Alliance.
In August 2022, the performance of the BIRO BR100 (general-purpose GPU) surpassed that of the NVIDIA A100, and its specifications were announced at the Hot Chips 34. The BR100 consists of two chiplets, based on TSMC's 7nm process, and 25D CoWoS (Chip-on-Wafer-on-Substrate) packaging technology; Due to restrictions imposed by the United States, TSMC has suspended the supply of the technology to the wall.
The current US-China dispute highlights the importance of chiplet technology, but it has been used by some key industry players for years and is the main driving force behind AI, IoT and autonomous driving, which ensures strong growth for chiplets over the next 20 years. Microsoft, Google, Intel, TSMC, and others have been working on an interconnect standard such as Universal Die Interconnect Technology (UCIE), which will enable wafers from different manufacturers to be easily integrated into a single package.
Chiplets are a continuation of Moore's Law, and device scaling is becoming more difficult, and mask and wafer sizes are approaching their maximum limits. As Gordon Moore predicted, "It turns out that it may be more economical to build large systems with smaller functions that are individually packaged and interconnected." ”
Chiplets use advanced package interconnect technology to split large, versatile, single-silicon wafers into multiple single-purpose dedicated wafers. TechInsights has been actively tracking chiplet-based devices in the logic segment for nearly a decade, and we first analyzed the Xilinx 580T FPGA, which has two FPGA wafers and an interconnect for the middle layer. In recent years, TechInsights has analyzed chiplet-based devices from several manufacturers, including Intel, Apple, and AMD.
Intel's Embedded Multi-Chip Interconnect Bridging (EMIB) is a method of interconnecting high-density heterogeneous chips within a package that enables the high-bandwidth communication required by multi-chip multi-core processors. Intel also introduced FoverOS packaging technology, which provides greater capabilities to mix and match processor components with optimal manufacturing processes.
TSMC also showcased its silicon bridge solution, with TechInsights analyzing its recent integrated fan-out local silicon interconnect (Info-L or Info-LSI) Apple package and finding that CoUOs-L employs a similar concept. In addition, TSMC's system-on-chip (SoIC) uses bonding technology to heterogeneously integrate known high-quality chips of different chip sizes, functions, and node technologies that are fully compatible with existing CONOs and INFO solutions. TechiniSights recently analyzed AMD's Ryzen 7 and Ryzen 9 processors, which use TSMC's SOIC advanced packaging technology to interconnect cache chips with compute chips in chip-based packages.
Silicon (SPIL) also has advanced packaging technology that utilizes embedded bridge chips. An AMD device recently analyzed by TechInsights showed that four bridge chips were used in a single package to implement the chiplet design.
About Sanquan Technology
Founded in 2000, Shenzhen Sanquan Asia-Pacific Technology Co., Ltd. is the leading integrated circuit IC business in Asia, with more than 200 product lines, and has been selected by many customers as a reliable supplier of integrated circuit IC and electronic components. Sanquan Technology supplies HBM to the world's three major memory manufacturers, SK hynix, Micron and Samsung. The excellent Yangtze River Storage in China is also its customer. From this, it can be seen that the product competitiveness of Sanquan Technology. In addition, the brands distributed by Sanquan Technology include Richtek, ON, Microchip, TI and so on.