TSMC started the production of 2nm chips, adopted GAAFET technology, and abandoned the old FinFET!
In the wafer manufacturing process, "line width" is an important measure.
What is the line width? It is the smallest line corrosion width, and the thinner the line, the more wafers can be etched per unit area, and the higher the efficiency.
However, line widths are not endless, and in order for a line to continue working, it must maintain a width of hundreds of atoms.
Above 28 nm, the linewidth has not changed much. The 28 nm process is almost the ultimate in physical etching.
But why after 28 nanometers, 22 nanometers, 14 nanometers, 7 nanometers, 5 nanometers, 3 nanometers, these are all equivalent technologies, by optimizing the structure and structure of the chip, to achieve the same energy efficiency as xxnm chips.
With the progress of Moore's Law, semiconductor processes can no longer be measured solely by "width", but can only rely on other processes.
For example, before 14 nm, everyone used planar FETs, but after 14 nm, Samsung began to develop FinFETs, which is also a new architecture.
However, FinFET chips can only support several generations at most, and chips above 5 nm are a bit outdated and need to be updated.
After 3 nm, Samsung began to adopt Gaafet, replacing the traditional FinFET, which is also a new technology.
Samsung originally thought that in the 3 nm process, they could catch up with TSMC with higher AAFET technology, but in the end it failed, and TSMC was far behind in terms of technology and market share.
Not long ago, TSMC announced that its 2nm chip manufacturing base has started construction and is expected to start production in April next year, after which P2 and Kaohsiung's 2nm wafer fabs will be put into 2nm process in 2025.
TSMC also followed Samsung's example, abandoning the traditional FinFET process and adopting Gaafet's process instead.
Compared to the FinFET process, the GaAFET process has a higher architecture and a smaller critical voltage, so it has higher efficiency, lower power consumption, and better energy consumption.
In addition to this, Intel has also announced that they will start producing 20 A (i.e. 2 nm) in 2024 and will ditch FinFETs in favor of Gaafet, or RibbonFETs and Powervia.
It can be expected that after the 2 nm process, there will be a battle between the dragon and the new generation of semiconductor chips, which will be a huge leap forward.