TSMC launched a blockbuster move to sprint 1nm chips, and foreign media Samsung is difficult to matc

Mondo Technology Updated on 2024-02-01

TSMC launched a blockbuster move to sprint 1nm chips, and foreign media Samsung is difficult to match!

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What is the limit of chip technology? When people thought that 5nm was the limit of chips, TSMC and Samsung have successively achieved mass production of 4nm and 3nm chips, and are constantly improving the performance limit of chips. And this does not seem to be the limit of chips, TSMC has launched it again"Ultimate", 1nm sprint chip, foreign media: Samsung is hopeless.

TSMC moves towards 1-nanometer chips.

It is generally accepted in the industry that Moore's Law has reached its limit and that the integrated circuit manufacturing process cannot be further developed. Moore's Law means that every 18 months, the number of transistors that can fit on an integrated circuit doubles at half the cost. In other words, the performance of the chip can continue to improve, and the ** of the chip will be lower and lower.

Moore's Law has guided the development of chip manufacturing processes for decades, and until some time ago, Moore's Law was still unfinished. But before 5nm, the pace of development of the chip manufacturing process was significantly slower, and TSMC's 3nm production was divided into multiple versions to transition to 2nm mass production by 2025.

Although Moore's Law has not yet reached its limit, the more the chip manufacturing process develops, the more difficult it becomes, and the cost of chip manufacturing is getting higher and higher. The cost problem naturally has to be borne by the customer, and TSMC and other chip manufacturers are tasked with constantly going beyond the chip process to provide customers with more powerful chip foundry services.

Because of this, TSMC launched one"Big moves"--1 nanometer chip. At the IEEE International Electronic Components Conference, TSMC shared its latest chip process development plan, with the goal of launching the A10 process in a 1nm process by 2030, with a single chip that can integrate 20 billion transistors.

Advanced packaging technology enables the integration of 1 trillion transistors in a single package.

The higher the number of transistors a chip has, the faster the chip's performance will react, resulting in greater progress in performance. 1 nanometer may seem out of reach, but it has actually become part of TSMC's plans for the future.

Before achieving mass production of 1nm, TSMC will also mass produce 2nm and 14nm process, its 2nm process fab is already under construction, so mass production will be achieved as soon as 2025, and then 1nm mass production will also be a step forward.

Samsung catches up with TSMC's challenge.

TSMC is the world's largest chip foundry, accounting for about 60% of the foundry market share. It continues to invest in R&D and leads the way in the development of advanced process technologies, and has now commercialized 7nm, 5nm and 3nm processes. These advanced process technologies enable chips with higher levels of integration, lower power consumption, and higher performance.

Samsung has set itself the goal of surpassing TSMC to become the world's largest system chip manufacturer, and has invested huge sums of money to continuously increase chip production. But now that TSMC has planned the development direction of the 1nm process, the leading edge of the technology is also very obvious.

It will be increasingly difficult for TSMC to catch up, especially in terms of wafer yield, customer support, and wafer capacity. Foreign media: Samsung is hopeless, and it is as difficult for Samsung to surpass TSMC as it is to do so.

Unless Moore's Law is really at its limit, there can be no further progress. At that point, there is a risk that TSMC's pace will slow down or stop, and then Samsung will explore new processes, new architectures, and perhaps change course.

Prior to this, Samsung must either solve the problem of customer resources first, otherwise there will be no customer orders, and the chip process will not be better.

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