Achronix offers SmartNIC solutions powered by FPGAs

Mondo Technology Updated on 2024-01-30

Author: achronix

As artificial intelligence machine learning (AI ML) and other complex, data-centric workloads are widely deployed, the demand for high-performance computing continues to soar, and the demand for high-performance networks continues to grow exponentially. Once a siloed field of supercomputers, HPC can now be seen at every level, from supercomputers to edge solutions, and as we push faster solutions to market, cybersecurity and high-complexity applications play an even bigger role.

To meet the demand for network acceleration and provide flexible, reprogrammable networks, Achronix offers Achronix's Network Infrastructure Code (ANIC) and SmartNICs built on Achronix Speedster7T FPGA chips for data center operators, cloud service providers, and telcos. These programmable accelerators integrate leading-edge technologies such as 400 GbE connection speeds and PCIe Gen 50 features, network-on-chip, and high-speed parallel processing to deliver an unmatched combination of performance, scalability, and flexibility.

The ANIC is a complete design consisting of modular FPGA IP that provides all the essential functional units of a SmartNIC solution optimized for high-performance network pipelines. It strongly supports 400 GbE and PCIe Gen 5The 0 function enables users of all types to quickly develop high-bandwidth smartNIC solutions based on their specific requirements, meeting their changing requirements as conditions change.

Better performance, more flexibility

To improve network performance, more and more customers are turning to SmartNIC as it can reduce the burden on the host server CPU by offloading routine tasks such as packet processing and encryption. In addition to the economic benefits of saving CPU cycles, offloading can improve overall system performance and resource efficiency. SmartNIC is also customizable and programmable, giving users the flexibility to adapt to changing network needs.

Infiniband (IB) is a traditional networking technology for high-performance computing. While IB's performance is good, it does not provide the flexibility or density required for HPC HPC solutions deployed in traditional data centers (using Ethernet as the standard network protocol). Achronix's ANIC solution supports 400 GbE for fast data transfer rates while also providing the ability to deploy network applications on a network interface card (NIC).This feature can significantly improve application performance and reduce transaction latency. The FPGA-based ANIC approach offers excellent determinism and consistently low application latency, making ANIC the preferred choice for applications with stringent real-time processing needs.

One way to implement the SmartNIC architecture is to add compute units (such as ARM cores, etc.) to the high-performance network data path to enable a flexible and programmable network. While the addition of CPU cores does provide network offload and application acceleration, the network performance that processor cores can provide is also limited by itself. Power and space constraints limit the number of cores that can be deployed on a single network card to 10, limiting the instruction set and therefore performance.

Instead of using performance-constrained ARM cores, ANIC runs on high-performance Achronix Speedster7T FPGA devices, and Anic's modular architecture simplifies the component selection process and speeds up the design phase. In addition, the partial reconfiguration of the Speedster7T FPGA device enables dynamic adjustment to meet changing requirements. This deployment agility can result in significant time and cost savings.

That's an order of magnitude leap in performance," said Scott Schweitzer, Director of Product Planning at Achronix Smartnic. "What can be done in a microsecond on an ANIC can take milliseconds on an ARM core, and what can be done in a few nanoseconds can take a few microseconds. ”

Based on ANA, users have the opportunity to deploy custom IP functions. This custom IP capability opens the door to custom applications such as key-value storage, intrusion prevention, data deduplication, and other networking functions, all of which run at 400 GB network speeds.

Using FPGA-Accelerated SmartNICs in High-Performance Computing: A Game Changer

High-performance computing environments require superior processing power, efficient data movement speeds, and high-speed interconnection capabilities for optimal performance. Various SmartNICs, especially FPGA-based solutions like those offered by Achronix, can meet these requirements seamlessly.

One of the main benefits of adopting FPGA-based SmartNICs in high-performance computing is customization. With Speedster7T, the reprogrammable FPGA with 400 GbE Ethernet and PCIe Gen5 capabilities is a versatile building block for high-performance computing clusters.

ACHRONIX built ANIC to enable users to optimize their network data paths and accelerate network applications. The ANIC provides a complete SmartNIC pipeline that includes packet interfaces, FIFO buffers, header resolvers, streams, rules engines, and DMA engines. Each functional unit can be selected or eliminated according to the customer's needs, enabling full or partial packet acceleration and reserving up to 50% of the logic resources for customer-defined network acceleration applications on the Speedster7T FPGA device.

The Speedster7T FPGA devices also offer 2D network-on-chip (2D NOC), which is designed to provide up to 20 Tbps of bandwidth within the FPGA chip and further enhance the deployment of modular applications. Each ANIC module can be placed on the FPGA or upgraded in real-time by utilizing 80 network access points.

Anic's logic blocks can be combined like Lego bricks to create tailor-made SmartNIC solutions," says Schweitzer. Depending on what they want to accomplish, customers can choose to assemble the solution using some or all of the ANIC functional units. "This modular composability ensures that users only use the modules they need for their specific application, eliminating unnecessary overhead.

In HPC, accelerated IO is crucial. SmartNIC allows for ultra-fast data movement, which facilitates the rapid processing of large data sets. For example, in DDoS mitigation applications that require deeper packet inspection, ANANIC's FPGA-based highly parallel design supports efficient packet processing to ensure that threats are identified and mitigated in a timely manner.

In the era of high-performance computing and data-driven applications, Achronix offers FPGA-based SmartNICs that deliver unmatched speed, offloaded processing power, enhanced security, and superior flexibility. Whether looking for high-speed data processing, reducing latency, or improving overall efficiency, SmartNIC paves the way for the future of high-performance networks. With the proliferation of data and the increasing demands of applications, SmartNIC represents a critical innovation for anyone looking to push the boundaries of high-performance networking and computing.

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