Mr. High Speed member - Jiang Jie.
Termination can solve a lot of reflection problems, if there is still a problem, is there a possibility that the termination resistor resistance value is not selected correctly?
For point-to-point topologies, the resistance value of the terminal shunt resistor is relatively easy to select, and the resistance value r of the termination resistor is the same as the characteristic impedance of the transmission line.
When VTT is 1V, the termination resistor R is taken as 30ohm, 50ohm, and 70ohm receiver voltages as shown below
It can be found that when the characteristic impedance of r and transmission line is both 50 ohm, the signal at the receiving end is basically not reflected. The reason is that the receiver input impedance is usually very high, and from the perspective of the signal, the impedance of the signal transmitted to the end is the resistance of the termination resistor, and the matching of r to the characteristic impedance of the transmission line eliminates the reflection caused by sudden impedance changes.
Unfortunately, the vast majority of DDR address control signals today are multiple-drive topologies, so the problem starts to get complicated.
Why should we pay more attention to the address control signal of DDR when the data signal rate of DDR is higher? Data signals are generally point-to-point topologies, and most of them have on-chip termination (ODT), and the signal quality is usually more guaranteed with simple wiring topology and termination blessings. The difficulty of designing DDR's address control signals lies in the complexity of its topology, and the routing topology of one drive has too much impact on the signal quality, even if the rate is halved compared with the data signal.
In order to make the effect of termination resistors more obvious, we chose a difficult case: a DDR4 address signal with a rate of 1600Mbps for one drive and nine drives.
Since reflections are more likely to accumulate at the proximal particles DRAM1 DRAM2, signal quality is more likely to be a bottleneck there.
For comparison, let's take a look at the unterminated proximal DRAM1 signal.
As expected, the waveform is chaotic and the eye diagram is closed.
Let's take a look at how the signal quality of the proximal particles changes according to the original design of the 39ohm termination resistor.
It was evident that the waveform quality had improved considerably, and the eyes had opened. However, some waveforms will still fall at the threshold level (vih: 690mV; vil:510mV), in this case, the timing is likely to fail.
The three termination resistor values are scanned below: 25ohm, 39ohm, and 51ohm, and the waveform comparison of the proximal particle signal is as follows:
It can be found that the signal quality is gradually improved according to the change from large to small resistance values of these three resistances.
This trend is even more pronounced when comparing the degree of openness of the eye diagram.
In order to see more clearly, expand the three eye diagrams on the timeline for comparison.
At the threshold level (vih: 690mV; vil: 510mV) as a judgment criterion, the eye diagram of the 25ohm termination resistor is sufficient, and the other two are not.
Of course, this is a multi-load topology, and other signals on the DDR need to be paid attention to. Through comparison, Mr. High Speed found an interesting phenomenon, the same resistance change, the signal quality change on the distal particle DRAM9 is exactly the opposite of the proximal particle.
Fortunately, the remote DDR has a larger signal margin because it is closer to the termination resistor, so it can "make up for the deficit", and even if the worst far-end waveform is selected at 25ohm, the eye diagram can meet the threshold level requirements.
Does that mean that all one-wheel drive multi-DDR address control signals have the same trend as the resistance value of the termination resistor changes? With this case alone, Mr. High Speed is not able to draw a general conclusion. The only thing that is certain is this: the future is bright, the road is tortuous, and the resistance is uncertain. The more complex the topology and the higher the rate, the more necessary it is to determine the optimal termination resistance by **.
Here's the problem. What are the methods you know to optimize the signal quality of DDR address control?
About Yibo: Yibo Technology was established in March 2003 and is a listed company on the Shenzhen Growth Enterprise Market (GEM) 301366. Focus on high-speed PCB design technical services, R&D prototypes and batch PCBA production services. We are committed to building a first-class hardware innovation platform, accelerating the hardware innovation process of electronic products, and improving product quality.
Our company has set up more than 10 R&D institutions at home and abroad, with more than 700 R&D engineers around the world. Yibo's wholly-owned PCBA factory is located in Shenzhen, and has set up branches in Zhuhai, Shanghai, Chengdu, Changsha and Tianjin, equipped with new imported Fujifilm NXT3 multi-function placement machine, XPF multi-function placement machine, AIMEX III high-speed placement machine, automatic solder paste printing machine, 12-temperature zone lead-free (nitrogen) reflow oven, wave soldering and other high-end equipment, and equipped with ** 3D AOI, 3D Xray, 3D SPI, intelligent first article tester, automatic board splitting machine, BGA rework station, ICT, selective conformal coating and other equipment, focusing on high-quality R & D express, batch SMT patch, assembly and other services. As the first batch of SMT express manufacturers in China, the 48-hour delivery rate is more than 95%. More than 120,000 kinds of commonly used electronic components are in stock, and full BOM component services are provided.
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