Moore's Law is stagnant, and China's chips have plenty of time to catch up with TSMC and Samsung!
As we all know, in terms of chip technology, there is still a big gap between China's Chinese mainland and the world's advanced chip technology. For example, TSMC and Samsung have launched a 3nm process and will launch a 2nm process in 2025.
What are we going to do? The current 14 nm, that is, the difference of about 10 years.
Huawei's Kirin 9000 means that we still have a long way to go from the 7 nm process, even if it is 7 nm, it will take more than five years, as long as anyone with a little brain can see it.
This is also the reason why the United States wants to stop or delay the progress of the United States in chip technology, so that the United States can reap the benefits.
For example, extreme ultraviolet lithography machines do not need to be sold to Chinese mainland, and now, two state-of-the-art deep ultraviolet immersion lithography machines do not need to be sold to Chinese mainland**.
It is true that the situation is serious, but we don't need to worry too much, because the current chip technology has reached the physical limit, and we can fully catch up with TSMC and Samsung.
What are 14nm, 7nm, 3nm, etc. in the wafer process? That is, the width of the door. There are also some people who use it"Line width"(line width) indicates the minimum etch width of the chip.
However, since the 28nm process, the wafer industry's wire thickness has not improved substantially, as circuits can only provide power in tens or even hundreds of atoms wide.
From 28nm onwards, the progress in the wafer process is mainly reflected in the improvement of the architecture and process, which enables the same energy efficiency and efficiency to be achieved.
For example, the 28 nm process, we use the 28 nm process to make it, in the next generation process, the line width remains the same, theoretically it is also 28 nm, but because of the improvement of architecture, process and other aspects, it has increased by 15%, is it 28 nm now, or 22 nm? It's like 22nm, 14nm, 10nm, and so on.
Again, 7 nm, 5 nm, and 3 nm do not mean 7 nm, 5 nm, and 3 nm linewidths, but only improvements in architecture, process, etc., so that they theoretically have the energy efficiency and functions of 5 nm and 3 nm.
Some time ago, the development of the chip manufacturing process did not rely on reducing the lineweight, but through more advanced architectures, such as FinFET transistors, Gaafets, and 3-D transistor stacks"To reproduce"Moore's Law, and these structures ultimately mean"Equivalent process"Process! At.
In addition, since the line width has not really decreased, semiconductor equipment such as lithography and etching equipment are required to manufacture such chips. In such a situation, although the so-called wafer manufacturing process is still moving forward, it is in fact stagnant, and we still have plenty of time to catch up.
Even if we don't have advanced EUV lithography technology and advanced immersion deep ultraviolet lithography technology, we can solve this problem by upgrading the structure and process, improving the transistor structure, and improving the packaging process.